Ic 555 timer and Astable multivibrator using IC 555 with pin description and circuit diagram:-


IC 555 (Timer):- 

This is one of the most widely used IC and can be used in stable and astable mode. It can be used as clock, pulse generator, frequency divider and ramp generator etc. 

Circuit diagram of IC 555 timer 



It is used in various electronic circuits . It works as square waveform generator , Oscillator and as a flip-flop element and it can also provide time delay in many circuits which is used to provide time delays,
integrated ckt chip used in many variety of timers, delay, pulse generation & oscillator and many other applications.
It is versatile low-cost, easy to use and reliable. The operation and function of IC 555 is given below:-

  • Pin 1:- It is used for grounding the system.
  • Pin 2 (Trigger) :- Input to the lower comparator is used to set the flip-flop. When the voltage at Pin 2 crosses above to below (Vcc/3), the comparator switches to a high, setting the flip-flop.
  • Pin 3 (output) :- The output is taken by inverting the source.
  • Pin 4 (reset) :- Active low reset, which forces Q bar high and pin 3 (output) low.
  • Pin 5 (Control):- It control the supply voltage Vcc.
  • Pin 6 (Threshold):- Input to the comparator1 ,which is used to reset the flip flop. When the voltage at this pin-6 crosses from below to above 2/3 Vcc ,the comparator switch switches to high, & reseting the flip flop.
  • Pin 7(Discharge) :- It is connected to open collector of NPN transistor and it is used to short the pin 7 to the ground when Q bar is high, which will discharge the external capacitor.
  •  Pin 8 (Vcc):- Supply voltage Vcc can range from 4.5 to 18 volt the 555 named from three (5kΩ) resistor.

Astable multivibrator using IC 555 :- 


Circuit diagram of astable multivibrator using IC 555

  • Initially at the starting when the power is put ON. The capacitor is discharged which places 0 volt at pin 2 , forces the lower comparator high which set the flip-flop that is Q bar is low and output is high.
  • When the output is high, discharge transistor is open, which allow the capacitor to charge towards Vcc via RA and RB.
  • When the capacitor voltage exceeds Vcc/3 the lower comparator goes low, this has no effect on SR flip flop. However when capacitor voltage exceeds 2Vcc/3 the upper comparator goes high, resetting the flip-flop forcing the output low and Q bar high.
  • when Q bar is high, the transistor shots pin7 to ground which makes the capacitor discharge through RB.
  • Now when capacitor voltage drop below Vcc/3 the lower comparator goes high back again, setting the flip-flop and making Q bar low and output is high. 


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